labeled-RISC-V标签化RISC-V项目
labeled-RISC-V —— 标签化RISC-V项目
该项目基于 RocketChip 增加了标签功能, 给硬件请求打上标签, 赋予硬件区分, 隔离和优先化三种新能力。
目录结构:
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├── board # supported FPGA boards and files to build a Vivado project
├── boot # PS boot flow of zynq and zynqmp
├── doc # some development documents (but in Chinese...)
├── emu # wrapper of the original rocketchip/emulator to support fast memory initializaion
├── lib # HDL sources shared by different boards
├── Makefile
├── Makefile.check
├── Makefile.sw
├── pardcore # wrapper of rocketchip in the Vivado project
└── README.md # this file
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